1. Field of the Invention
The present invention generally relates to fabrication of semiconductor devices, and more particularly, to a technique for removing damaged silicon from the contact region between doped silicon and a conductive layer during a fabrication process of semiconductor devices.
2. Description of the Related Art
Along with miniaturization of semiconductor integrated circuits, the aspect ratio of contact holes is increasing, while the depth of impurity-diffused regions in a semiconductor substrate is decreasing. The line and space patterns of gate electrodes are also becoming narrower and minute. Under these circumstances, sufficient areas have to be guaranteed for silicide formation.
In general, contact holes are formed by etching an insulating interlevel dielectric 1003 using a resist pattern 1004 as a mask, as illustrated in FIG. 1A. For example, silicon oxide (SiO2) defining the insulating interlevel dielectric 1003 is etched by plasma etching under fluorocarbon gas supply, until the impurity diffused region 1002 formed in the silicon substrate 1001 is exposed.
To perform plasma etching on the silicon oxide layer 1003, the ion energy in plasma is raised to 1 KeV or higher. To this end, when conducting over-etching on the exposed impurity diffused region 1002 after the removal of the silicon oxide layer 1003, damaged layer 1005 is created in the impurity diffused region 1002 due to ion impact. The damaged layer (or damaged silicon) 1005 is caused by silicon-carbon (Si—C) bonded by carbon ions implanted during the plasma etching. The damaged layer 1005 reaches a depth of 5 nm from the surface of the impurity diffused region 1002.
Such a damaged layer may also be produced by dry etching during the process of side-wall formation. In addition, silicon damage occurs when fabricating gate electrodes, even before impurity injection, mainly due to electromagnetic waves. Damaged layers created during the gate etching will cause the parasitic resistance of the LDD region to be formed in the subsequent process to increase, and undesirable junction leakage will occur.
To prevent damage in the impurity diffused region 1002, it is proposed to reduce the ion energy in plasma to or below 0.5 KeV from 1 KeV. Silicon oxide can be etched at the ion energy of about 0.5 KeV, and the depth of the damaged layer 1005 can be reduced.
However, if the ion energy is lowered, the etching selectivity of the silicon oxide layer 1003 with respect to the silicon substrate 1001 also falls. As a result, the silicon substrate 1001 is etched excessively, at depth of 50 nm or more, as illustrated in FIG. 1B. In the present state of the technology in which the impurity diffused region 1002 is designed to be shallower along with the miniaturization of the device scale, excess etch 1006 due to degraded etching selectivity is a serious problem. Accordingly, lowering the ion energy to prevent generation of damaged layers is impractical.
Since the damaged layer 1005 existing at the surface of the impurity diffused region 1002 has a high resistance, leading to increased contact resistance, the damaged layer 1005 has to be removed. To remove the damaged layer 1005, isotropic etching using a fluorine radical, such as CF4 or SF6, is employed conventionally. With isotropic etching, undercut 1009 is generated at the bottom of the contact hole 1020, as illustrated in FIG. 2A. If a titanium (Ti) or titanium nitride (TiN) barrier metal layer 1007 is formed in the contact hole 1020, the contact hole 1020 cannot be completely covered with the barrier metal layer 1007 with discontinuity occurring at the undercut 1009, as illustrated in FIG. 2B. In this state, when the contact hole 1020 covered with a defective barrier metal 1007 is filled with a metal 1010, such as tungsten (W), the metal reacts with silicon at the break in the barrier metal 1007. As a result, metal silicide 1008 is produced abnormally at the undercut 1009, and junction leakage current increases.
JP 2000-91310A (Publication 1) discloses a method for removing such a damaged layer by etching the substrate with hydrogen plasma under the condition of hydrogen gas ratio at or above 80%, the amount of gas flow at or above 50 SCCM, and pressure at or above 50 mTorr.
JP 10-209428A (Publication 2) discloses a technique for increasing the boundary area size between a semiconductor substrate and a conductive film in order to decrease the contact resistance. With this technique, V-shaped grooves or tapered grooves (with an inverted trapezoidal cross-section) are formed in the (111) or (100) plane of the substrate exposed at the bottom of the contact hole by anisotropic etching. By forming grooves at the bottom of the contact hole, the contact area size is increased.
JP 2002-289554A (Publication 3) discloses a technique for introducing a metallic element with activation energy for silicidation of 1.8 eV or lower into storage electrodes at a prescribed density, in order to reduce leakage current and to improve the refresh characteristic of a DRAM. Examples of metallic atoms with silicidation activation energy at or below 1.8 eV include titanium (Ti), nickel (Ni), cobalt (Co), and platinum (Pt). By positively introducing a metal that easily reacts with silicon for silicidation into the silicon substrate, gettering sites are produced, and DRAM leakage current can be reduced.
However, no temperature control is conducted in Publication 1 (2000-91310A), and accordingly, the surface shape of the substrate should become isotropic after the removal of the damaged layer. This means that occurrence of undercut cannot be prevented, and contact resistance cannot be reduced efficiently.
The method proposed in Publication 2 (10-209428A) is applicable only to structures having sufficiently wide contact areas. This method is unsuitable for removal of damaged layers from the bottom of contact holes with a high-aspect ratio.
In Publication 3 (2002-289554), a metal element is introduced to the substrate in a oxide-film etching chamber. Accordingly, if a number of wafers are processed, the amount of metal element to be introduced is likely to fluctuate. This is because the injection amount of the metal to be introduced varies due to the influence of organic products generated during the etching process of the oxide film.